Impact of contact resistance on the electrical properties of MoS2 transistors at practical operating temperatures

Molybdenum disulphide (MoS2) is currently regarded as a promising material for the next generation of electronic and optoelectronic devices. However, several issues need to be addressed to fully exploit its potential for field effect transistor (FET) applications. In this context, the contact resistance, RC, associated with the Schottky barrier between source/drain metals and MoS2 currently represents one of the main limiting factors for suitable device performance. Furthermore, to gain a deeper understanding of MoS2 FETs under practical operating conditions, it is necessary to investigate the temperature dependence of the main electrical parameters, such as the field effect mobility (μ) and the threshold voltage (Vth). This paper reports a detailed electrical characterization of back-gated multilayer MoS2 transistors with Ni source/drain contacts at temperatures from T = 298 to 373 K, i.e., the expected range for transistor operation in circuits/systems, considering heating effects due to inefficient power dissipation. From the analysis of the transfer characteristics (ID−VG) in the subthreshold regime, the Schottky barrier height (ΦB ≈ 0.18 eV) associated with the Ni/MoS2 contact was evaluated. The resulting contact resistance in the on-state (electron accumulation in the channel) was also determined and it was found to increase with T as RC proportional to T3.1. The contribution of RC to the extraction of μ and Vth was evaluated, showing a more than 10% underestimation of μ when the effect of RC is neglected, whereas the effect on Vth is less significant. The temperature dependence of μ and Vth was also investigated. A decrease of μ proportional to 1/Tα with α = 1.4 ± 0.3 was found, indicating scattering by optical phonons as the main limiting mechanism for mobility above room temperature. The value of Vth showed a large negative shift (about 6 V) increasing the temperature from 298 to 373 K, which was explained in terms of electron trapping at MoS2/SiO2 interface states.


Introduction
Transition metal dichalcogenides (TMDs) are compound materials formed by the Van der Waals stacking of MX 2 layers (where M = Mo, W, etc., i.e., a transition metal, and X = S, Se, Te, i.e., a chalcogen atom). Among the large number of existing layered materials [1], TMDs are currently attracting increasing scientific interest due to some distinct properties, such as the presence of a sizable bandgap in their band structure. As an example, MoS 2 (the most studied among TMDs due to its high abundance in nature and relatively high stability under ambient conditions) exhibits an indirect bandgap of ≈1.3 eV in the case of few layers and bulk material and a direct bandgap of ≈1.8 eV in the case of a single layer. These properties make MoS 2 an interesting material for the next generation of electronics and optoelectronics devices [2]. As an example, field effect transistors with very interesting performance in terms of the on/off current ratio (10 6 -10 8 ) and low subthreshold swing (≈70 meV/ decade) have been demonstrated using single [3] and multilayers of MoS 2 [4].
MoS 2 thin films, obtained either by cleavage from the bulk material or by chemical vapor deposition, are typically unintentionally n-type doped. Since well-assessed methods for doping enrichment of MoS 2 under source/drain contacts are still lacking, MoS 2 transistors are mostly fabricated by deposition of metals directly on the unintentionally doped material, resulting in the formation of Schottky contacts. Experimental investigations showed that both low work function (e.g., Sc, Ti) and high work function (e.g., Ni, Pt) metals mostly exhibit a Fermi level pinning close to the conduction band of MoS 2 [5], resulting in a Schottky barrier height (SBH) for electrons typically ranging from 0.1 to 0.3 eV. The origin of this Fermi level pinning is currently a matter of investigation and a crucial role seems to be played by nanoscale defects/inhomogeneities at the metal/MoS 2 interface [6,7].
The presence of this small but not negligible Schottky barrier at source/drain contacts certainly has a strong impact on the electrical characteristics of MoS 2 transistors in the subthreshold regime [5]. In addition, the resulting source/drain contact resistance, R C , can also have a significant influence on the electrical properties of the device in the on-state, i.e., above the threshold voltage (V th ). In particular, R C is expected to affect, to some extent, the values of V th and of the field effect mobility μ extracted from the transfer characteristics (drain current, I D, vs gate bias, V G ) of the device and of the on-resistance (R on ) extracted from the output characteristics (drain current, I D, vs drain bias, V DS ). Clearly, all these parameters (V th , μ, and R on ) have their own dependence on the temperature, and their combination results in the device electrical characteristics at a fixed measurement condition. Hence, to gain a deeper understanding of the behavior of MoS 2 transistors for real applications, a temperature-dependent characterization of the main electrical parameters under practical operating conditions is mandatory. A temperature range from room temperature to 400 K is a realistic range for device operation in circuits/systems, taking into account the heating effect they undergo due to inefficient heat dissipation. However, to date, only a limited number of papers have focused on the high temperature behavior of MoS 2 transistors [8,9].
In this paper, we report a detailed temperature dependent investigation of multilayer MoS 2 transistors with Ni source/drain contacts, focusing on the role played by the contact both in the subthreshold regime and above the threshold voltage. In contrast to other literature works, mainly focused on the use of low work function contacts (such as Sc or Ti) to minimize the effect of contact resistance in n-type MoS 2 FETs [5], we focused on a high work function metal such as Ni in this paper in order to evaluate the impact of Ni/MoS 2 contact resistance on the device field effect mobility μ and threshold voltage V th . The interest on Ni was also motivated by the recently demonstrated possibility to achieve MoS 2 FETs with ambipolar behavior by performing a temperature-bias annealing processes on as-deposited Ni contacts [10]. In the following, the temperature dependence of μ, V th and R C in the range from 298 to 373 K was determined and the physical mechanisms of these dependences were discussed.

Results and Discussion
Back-gated transistors have been fabricated using multilayer MoS 2 flakes (with thickness ranging from ≈40 to ≈50 nm) exfoliated from bulk molybdenite crystals onto a highly doped Si substrate covered with 380 nm thick, thermally grown SiO 2 . Such relatively thick MoS 2 samples have been chosen since it has been reported that the electrical properties (μ, V th ) of simple back-gated transistors fabricated with multilayer MoS 2 are much less affected by the effect of the external environment (water/oxygen) [9] with respect to single or few layer devices [11], for which encapsulation is instead required to achieve good electrical performance [3].
Furthermore, as reported in the literature, carrier mobility is only slightly dependent on MoS 2 thickness for transistors fabricated on ≈20 to ≈70 nm thick flakes, whereas stronger variations are observed for thinner flakes, with the largest mobility values obtained for thicknesses ranging from 6 to 12 nm [5].
The experiments discussed in this paper have been carried out on a set of ten FETs fabricated on the same substrate. For consistency, the reported temperature-dependent analysis has been carried out on one of the transistors from this set of devices. Figure 1a shows a schematic representation including an optical image of a MoS 2 transistor with the SiO 2 /Si backgate and Ni/Au source and drain contacts. An atomic force microscopy image (Figure 1b) and the corresponding height linescan (Figure 1c) of the MoS 2 flake on the SiO 2 substrate are also reported, showing ≈40 nm flake thickness.
The transfer characteristics (I D −V G ) measured at a low fixed drain bias (V DS = 0.1 V) on this device at different temperatures from 298 to 373 K are reported in Figure 2 both on a semilogarithmic scale (Figure 2a) and on a linear scale (Figure 2b). Clearly, the linear scale plot allows the current transport above the threshold voltage (V th ) to be studied, whereas the semilog scale plot allows for a better visualization of transport in the subthreshold regime. In the following two sections, a detailed analysis of the characteristics in the subthreshold and abovethreshold regime will be reported and the device electrical parameters will be extracted. In particular, the Ni/MoS 2 Schottky barrier height and the flat band voltage (V FB ) will be evaluated from the temperature-dependent analysis of the subthreshold I D −V G curves, whereas the temperature behavior of V th and μ will be obtained from the curves above the threshold.

Subthreshold behavior
The semilog scale I D −V G characteristics ( Figure 2a) measured at 298 K exhibit a current variation of more than six orders of magnitude in the bias range from V G = −55 V to 0 V. This current variation is significantly reduced with increasing the temperature from 298 to 373 K, especially due to the strong increase of current with the temperature at large negative bias.   Figure 3a, where the I D −V G characteristics in the gate bias range from −55 to −35 V and at different temperatures from 298 to 373 K have been reported. Such strong dependence of I D on T suggests that current transport in the subthreshold regime is dominated by thermionic current injection through the reverse biased source/MoS 2 Schottky contact, according to the relation [5], where Φ B (V G ) is the effective Schottky barrier height (SBH), modulated by the gate bias V G . To verify this, for each V G an Arrhenius plot of I D /T 2 vs 1000/T is reported in Figure 3b. A nice linear dependence was observed for all the V G in the considered bias range. The effective SBH values Φ B , obtained from the slope of the linear fit of the Arrhenius plot in Figure 3b are reported in Figure 3c as a function of V G . The schematic band diagrams corresponding to the different transistor operation regimes, i.e., depletion (i), flat band (ii) and accumulation (iii), are also illustrated in the inserts of Figure 3c.

This is better highlighted in
In the depletion regime ( Figure 3c (i)), the applied gate bias induces an upward band bending, ψ, in MoS 2 at the interface with the SiO 2 gate insulator. The experimentally evaluated SBH is found to depend linearly on V G . This dependence can be fitted with the relation where Φ B (V FB ) is the effective SBH at the flat band voltage and the term ψ = γ(V G −V FB ) is the upward band bending. The slope γ indicates the modulation efficiency of Φ B by the gate bias. It depends on the SiO 2 layer capacitance, C ox = ε 0 ε ox /t ox ≈ 9.1 × 10 −5 F/m 2 (ε 0 is the vacuum dielectric constant, ε ox = 3.9, t ox = 380 nm, the permittivity and the thickness of the SiO 2 film, respectively), on the capacitance of the MoS 2 depletion region, C s , as well as on the capacitance associated with MoS 2 / SiO 2 interface traps, C it [5]. In the depletion regime, the current transport in the transistor is ruled by thermionic emission (TE) of electrons from the source contact to the channel.
The effective SBH Φ B and, hence, the band bending ψ = Φ B (V G )−Φ B (V FB ) is found to decrease linearly moving toward positive V G values. The flat band voltage V FB corresponds to the gate bias for which ψ = 0 (see (ii) in Figure 3b), whereas for V G > V FB the band bending ψ < 0 (see (iii) in Figure 3b), i.e., the channel starts to accumulate electrons. In the accumulation regime, current injection in the channel is ruled by thermionic field emission (TFE) through the source triangular barrier. The TFE mechanism yields a reduced effective SBH with respect to the constant Φ B value (red dashed line in Figure 3c) that would be expected if only TE over the barrier would occur. As a guide for the eye, the SBH dependence on V G in the accumulation regime has been fitted with a blue line in Figure 3c. Hence, V FB = −39.6 V can be experimentally determined as the bias corresponding to the intercept between the two linear fits [5].
The corresponding SBH value Φ B (V FB ) = 0.18 eV represents the "real" (i.e., gate bias independent) value of the Ni/MoS 2 Schottky barrier.
The experimental V FB for the MoS 2 transistor exhibits a large negative value, as reported in other literature works [12]. Such a result has been ascribed to donor-like interface trap states (positively charged when empty) between the SiO 2 and MoS 2 [13,14]. In order to evaluate the amount of this positive charge at the interface, it is worth comparing the experimental value with the one deduced from theoretical expression of the flat band voltage (V FB,id ) of an ideal metal-oxide-semiconductor field effect transistor (i.e., without fixed or interface charges). V FB,id is expressed as [15]: where W M is the work function of the gate material (4.05 eV for the n + -doped Si back gate in our transistor), χ is the semiconductor electron affinity (4.2 eV for MoS 2 ), N D is the semiconductor doping concentration (on the order of 10 16 cm −3 in unintentionally doped MoS 2 ) and n i is the intrinsic carrier concentration (for MoS 2 , cm −3 ). According to this expression a low value of V FB,id slightly varying with the T (from −0.35 V at 298 K to −0.42 V at 273 K) would be expected for our device. The negative shift of the experimental V FB with respect to V FB,id can be accounted for by the presence of a net positive charge density at the interface with SiO 2 that can be evaluated as C ox (V FB −V FB,id )/q ≈ 2.2 × 10 12 cm −2 .
In the following section, the device transfer characteristics above the threshold will be analyzed to extract the threshold voltage and mobility.

Transfer characteristics above threshold
The linear scale transfer characteristics (Figure 2b) show very low current below a threshold voltage (V th ) and a nearly linear increase of I D vs V G above V th . Two effects can be observed from the comparison of the I D −V G curves at increasing temperatures, i.e., (i) a negative shift of the threshold voltage and (ii) a decrease of the I D −V G curve slope in the linear region above V th . The origin of these two effects will be discussed more in detail later on. Interestingly, as a result of these two competing effects, the I D −V G characteristics tend to cross nearly at the same gate bias V G = −21 V (see details in the insert of Figure 2b). This bias condition can be interesting for some ap-plications where it is desirable that the device performance does not depend significantly on the temperature (dI D /dT ≈ 0). Figure 2c shows the transconductance g m vs V G curves calculated by differentiation (g m = dI D /dV G ) of the I D −V G characteristics in Figure 2b. In the considered bias range, all the curves exhibit an increase of g m with V G up to a maximum value, followed by a decrease of g m . The maximum transconductance value (g m,max ) is found to decrease with increasing temperature. Furthermore, a rigid shift of the g m -V G curves toward negative gate bias values is observed with increasing T.
From the linear scale transfer characteristics and the transconductance, two key electrical parameters for transistor operation, i.e., the threshold voltage (V th ) and the field effect mobility (μ), are typically evaluated. Figure 4a shows a linear scale plot of I D (left axis) and of the transconductance g m (right axis) at V DS = 0.1 V and T = 298 K. The field effect mobility in the linear region, μ lin , of the transfer characteristics is typically extracted from the transconductance using the following formula where L and W are the channel length and width, respectively, and C ox the SiO 2 gate capacitance. For our device with L/W = 7 μm/25 μm and C ox ≈ 9.1 × 10 −5 F/m 2 , the evaluated mobility from the maximum transconductance value g m,max was μ lin = 31.75 cm 2 V −1 s −1 , as indicated in Figure 4a. A method for evaluating V th consists of drawing the tangent line to the I D −V G curve at the bias (V G,max ) corresponding to g m,max and taking the intercept with the I D = 0 baseline [16], as shown in Figure 4a.
This procedure can be explained by simple geometrical considerations. In the linear region of the transfer characteristics, I D can be expressed as [14]: (2) Hence, it results that I D,max = g m,max (V G,max −V th ) and the threshold voltage can be calculated as As a matter of fact, for the evaluation of V th,lin and μ lin based on Equation 2 the contribution of the contact resistance is assumed to be zero. However, as deduced from the analysis of the subthreshold characteristics, a Schottky barrier is associated to the source/drain contacts with MoS 2 , which is also expected to result in a non-negligible contact resistance, R C . The value of the contact resistance above the threshold and its temperature dependence will be estimated in the last section of this paper from the analysis of the on-resistance (R on ) extracted from the device output characteristics (I D −V DS ) at low V DS . Here, we want to discuss how R C can influence the evaluation of μ and V th from the transfer characteristics.
In order to take into account the role of R C , V DS can be replaced by V DS −I D R C in Equation 2, and solving by I D , the following expression for I D is obtained: where μ 0 and V th,0 represent the values of the mobility and threshold voltage corrected by the effect of R C . As a consequence, the transconductance g m = dI D /dV G can be expressed as: (4) Noteworthy, the ratio is independent of R C . A plot of I D /g m 1/2 vs V G is reported in Figure 4b. The corrected value of the field effect mobility (μ 0 = 35.48 ± 0.25 cm 2 V −1 s −1 ) can be calculated from the slope of the linear fit of these data, whereas the threshold voltage (V th,0 = −34.99 ± 0.19 V) can be obtained from the intercept with the x axis. It is worth noting that the mobility value μ 0 after correction for the contact resistance is more than 10% higher than the value estimated without any correction, whereas the threshold voltage V th,0 after correction is only 1% higher than the value estimated without accounting for R C . This indicates that the underestimation of the mobility neglecting the contact resistance effect can be quite relevant, whereas the threshold voltage is less affected by R C . By repeating this procedure for all the measured characteristics reported in Figure 2b,c, the temperature dependence of the mobility (μ lin and μ 0 ), threshold voltage (V th and V th,0 ) in the considered temperature range has been evaluated, as illustrated in Figure 5a,b, respectively.
Both μ lin and μ 0 were found to decrease as a function of T with a similar dependence 1/T α , with α = 1.5 ± 0.2 in the case of μ lin and α = 1.4 ± 0.3 in the case of μ 0 . Such a dependence of μ ≈ 1/T α with α > 1 indicates that the main mechanism limiting the mobility of electrons in the multilayer MoS 2 channel in this temperature range is scattering by optical phonons, as reported by other experimental and theoretical investigations [4]. Instead, electron mobility was found to be limited by Coulomb scattering by charged impurities only at lower temperatures (<100 K) [4]. Noteworthy, scattering by charged impurities at the interface with the substrate results in the dominant mechanism for another well-studied 2D material, graphene, even at room temperature and higher temperatures [17,18].
In Figure 5b, the threshold voltage V th exhibits a negative shift of about 6 V with increasing the temperature from 298 to 273 K. For convenience, the difference V th −V FB is also reported in Figure 5b, right scale. It is useful to compare the experimental temperature dependence of V th with the expected theoretical variation with temperature, in order to understand which are the relevant physical parameters ruling this behavior.
For an ideal transistor (without interface states) operating under accumulation conditions, the shift between the threshold voltage V th,id and the flat band voltage V FB,id can be expressed as: where ψ th is the downward (negative) band bending at the threshold (as illustrated in the band diagram (iii) of Figure 3c, and N s (ψ th ) is the electron density in the channel at ψ th (6) where is the Debye length. The band bending ψ th can be evaluated assuming that the electron density in the channel at the threshold corresponds to N s (ψ th ) = tN D, where N D is the uniform doping concentration in the MoS 2 thin film and t its thickness. Assuming N D = 10 16 cm −3 for our unintentionally doped MoS 2 , we obtain N s ≈ 4 × 10 10 cm −2 . Furthermore, a value of ψ th ranging from approximately −34 meV (at T = 298 K) to −39 meV (at T = 373 K) can be estimated from the dependence of N s on ψ th in Equation 6. Under these assumptions, V th,id −V FB,id ≈ 0.7 eV (nearly independent of T) can be estimated, as indicated in Figure 5b (blue dashed line).
In order to account for the large change of V th with temperature, the role of interface states at SiO 2 /MoS 2 interface must be considered. The difference between the experimental V th −V FB and theoretical V th,id −V FB,id can be described by a term ΔV it = qN it /C ox , where N it is the density of trapped/detrapped electrons by SiO 2 interface traps. These interface traps exhibit a donor like behavior, i.e., they are positively charged above the Fermi level (when they are empty) and neutral below the Fermi level (when they are filled by electrons) [13]. Hence, electron trapping results in a neutralization of the interface states, resulting in a positive shift of V th with respect to V FB (i.e. ΔV it > 0). On the contrary, detrapping of electrons from these states results in an increase of the positive charge and, hence, in ΔV it < 0.
From the experimental data in Figure 5b, trapped electron densities N it = 2 × 10 11 , 1 × 10 11 , and 2 × 10 10 cm −2 are estimated at 298, 323, and 348 K, respectively, whereas a detrapped electron density N it = 1.3 × 10 11 cm −2 is obtained at 373 K (see Figure 5c). Electron trapping and detrapping at MoS 2 /SiO 2 interface have been shown to be thermally activated processes [13]. Hence, for a given interface trap distribution D it close to the MoS 2 conduction band, N it can be expressed as (7) where P tr (T) and P det (T) are the trapping and detrapping probabilities, respectively [13]. The experimentally found temperature dependence of N it can be explained as follows. As T increases, the shift of the Fermi energy E F with respect to E C increases as resulting in a change of the integration range in Equation 7. Furthermore, the difference P tr (T)−P det (T) can change with T. The dependence of N it on E F is also illustrated in Figure 5c. It is consistent with a decrease of D it with increasing E F −E C .  Furthermore, at 373 K, it can be argued that the P det becomes higher than P tr , resulting in a negative value of N it . The reciprocal of the I D −V DS curves slope in the linear region at low V DS is the device on-resistance R on , which can be expressed as: (8) where R C is the source and drain contact resistance and R ch the channel sheet resistance, which depends inversely on (V G −V th ), according to Equation 2. Figure 7a reports the plots of R on vs 1/(V G −V th,lin ) extracted from the I D −V DS characteristics in Figure 6 at the different temperatures. The linear fit of the data was performed for the four temperatures and, from the intercept with the vertical axis, the value of the contact resistance R C was estimated. The behavior of R C vs T is reported in Figure 7b, indicating an increase of R C T α , with α = 3.1 ± 0.3.

Output characteristics
Finally, the behavior of the output characteristics at high V DS is discussed. Figure 8a shows the I D −V DS characteristics measured at T = 298 K. The V G −V th value for each curve is indicated. It can be observed that the current saturation regime (i.e., I DS in- In the saturation condition, I D is only a quadratic function of V G −V th [14]: (9) where μ sat is the mobility value under saturation conditions and the term B is the so-called body coefficient, which depends on the gate oxide capacitance, on the doping concentration in the film and on the temperature: For thin gate dielectrics and low doping in the film, B can be approximated to 1, but for thick dielectrics and high doping its value can be significantly higher. In the case of our device with C ox = 9.1 × 10 −5 F/m and assuming a MoS 2 doping N D ≈ 1 × 10 16 cm −3 , B can range from ≈2.97 to ≈3.12 in the considered temperature range. In Figure 8b, I D 1/2 at V DS = 20 V is reported as a function of V G −V th , showing a linear behavior. According to Equation 9, the mobility under saturation condi-tion can be evaluated from the slope m of the fit, as . By repeating this procedure for all the output characteristics measured at the different temperatures, the behavior of μ sat as a function of T can be obtained. The main error source in the estimation of μ sat is related to the fact that the doping concentration N D and, hence, the coefficient B is not exactly known. Noteworthy, the values of μ sat in Figure 8c, estimated assuming N D ≈ 1 × 10 16 cm −3 , are very close to those evaluated from the linear region of the transfer characteristics (see Figure 5a) and exhibit a similar temperature dependence. This also confirms that the assumption for the doping concentration is correct.

Conclusion
In conclusion, a temperature dependent investigation of backgated multilayer MoS 2 transistors with Ni source/drain contacts in the range from T = 298 to 373 K has been performed. The SBH Φ B ≈ 0.18 eV of the Ni/MoS 2 contact was evaluated from the analysis of the transfer characteristics I D −V G in the subthreshold regime. The resulting R C associated with the SBH was determined by fitting the R on dependence on 1/(V G −V th ) extracted from the device output characteristics I D −V DS at low V DS . An increase of R C T 3.1 was demonstrated. The impact of R C on the values of μ and V th values was determined, showing an underestimation of μ by more than 10% if the effect of R C is neglected, whereas the influence of R C on the estimated value of V th is only 1%. Furthermore, the temperature dependence of μ and V th was investigated, showing a decrease of μ ≈ 1/T α with α = 1.4 ± 0.3 (indicating scattering by optical phonons as the limiting mechanism), and a negative shift of V th by about 6 V with increasing T. The role played by electron trapping at the MoS 2 /SiO 2 interface to explain such a large V th shift was discussed.

Experimental
Back-gated transistors were fabricated using MoS 2 flakes exfoliated from molybdenite bulk crystals (supplier SPI [19]) with thicknesses ranging from ≈40 to ≈50 nm and transferred onto a highly doped n-type Si substrate covered with 380 nm of thermally grown SiO 2 . An accurate sample preparation protocol has been adopted for controlled quality of the MoS 2 /SiO 2 interface, as this is crucial to achieve reproducible electrical behavior of the devices. In particular, thermo-compression printing using a Karl-Suss nanoimprint device with fixed temperature and pressure conditions [20,21] has been employed to transfer the exfoliated MoS 2 flakes onto the SiO 2 surface that was previously cleaned using solvents and a soft O 2 plasma treatment. Finally, source and drain contacts were obtained by deposition and liftoff of a Ni(50 nm)/Au(100 nm) bilayer.
The temperature-dependent electrical characterization in the range from 298 to 373 K was performed using a Cascade Microtech probe station with an Agilent 4156b parameter analyzer. All the measurements were carried out in dark conditions and under nitrogen flux.