1 article(s) from Hatem, Chris
- Full Research Paper
- Published 06 Aug 2018
-
PDF -
Album-
![]()
Figure 1: Schematic depicting MLD processing applied to silicon on insulator wafers. It shows monolayer forma...
-
![]()
Figure 2: Electrochemical capacitance–voltage profile showing the impact of applying a SiO2 capping layer for...
-
![]()
Figure 3: AFM images of (a) as received SOI (b) SOI after MLD processing.
-
![]()
Figure 4: ECV plot of active carrier concentrations in a 66 nm SOI after MLD using a 50 nm sputtered SiO2 cap...
-
![]()
Figure 5: ECV plot of active carrier concentrations using bulk silicon samples to analyse the variation of th...
-
![]()
Figure 6: X-ray photoelectron spectroscopy (XPS) study showing that there is a degree of surface oxidation af...
-
![]()
Figure 7: Secondary ion mass spectrometry analysis of a P-MLD-doped 66 nm silicon on insulator substrate. Blu...
-
-
Supp. Info
